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  • 2024/5/14 -Intel® Memory Latency Checker (Intel® MLC) is a tool used to measure memory latencies and b/w, and how they change with increasing load on the system.

    2024/7/5 -In the x86 architecture, the CPUID instruction is a processor supplementary instruction allowing software to discover details of the processor.

    2024/6/29 -CPU performance scaling enables the operating system to scale the CPU frequency up or down in order to save power or improve performance.

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    2024/6/19 -The ratio limits are defined in the processor's Machine Specific Registers (MSRs). Specifically, MSR 1ADh is used for the Turbo Ratio Limit configuration. turbo ...

    2024/4/26 -Provides the feedback mechanism using IA32_MPERF MSR and IA32_APERF MSR. OS can use the two MSRs to calculate CPU utilizations and then make P-state decisions.

    2024/6/10 -To access MSR registers, you can use the /dev/cpu/CPUNUM/msr device, where CPUNUM corresponds to the CPU number as listed in /proc/cpuinfo. The register ...

    A.>EAXに入るのはCALL 1CA3で呼び出された所から帰るべきアドレスですか? CALL命令は現在のEIPをPUSHしてEIPをデスティネーションアドレスに書き換える命令です。 「CALL 1

    A.Pen4ベースのCeleron 2,4GHzは、 もはやネットブック/Windowsダブレット向けのAtomにすら劣ります。 CPU性能比較 Hardware NAVI http://hard...

    2024/7/9 -MSR (immediate) ... This instruction moves an immediate value to selected bits of the PSTATE. For more information, see Process state, PSTATE. The bits that can ...

    2024/5/30 -The Linux MSR module, providing an interface to access model specific registers from user space, allows us to read out hardware performance counters with an ...

    2024/7/7 -Note that MSR_IA32_ENERGY_PERF_BIAS is defined per CPU, but some implementations share a single MSR among all CPUs in each processor package. On those ...

    2024/5/20 -... processor supports virtualizing MSR writes and reads to IA32_SPEC_CTRL. This VM-execution control is enabled when the tertiary processor-based VM-execution ...