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  1. Model-specific register - Wikipedia
    A model-specific register (MSR) is any of various control registers in the x86 instruction set used for debugging, program execution tracing, computer performance monitoring, and toggling certain CPU features.
    en.wikipedia.org/wiki/Model-specific_register
  2. CPU/MSR - SyncHack.com
    MSR (Model Specific Register、モデル固有レジスタ) †. MSR は、Pentium より実装 された CPU 固有のレジスタです。これらのレジスタは CPU 内部の特殊な制御を行うの に使用します。 MSR は、以下の用途に使用されます。
    mcn.oops.jp/wiki/index.php?CPU%2FMSR
  3. msr(4) - Linux manual page - man7.org
    /dev/cpu/CPUNUM/msr provides an interface to read and write the model-specific registers (MSRs) of an x86 CPU. CPUNUM is the number of the CPU to access as listed in /proc/cpuinfo. The register access is done by opening the file and ...
    man7.org/linux/man-pages/man4/msr.4.html
  4. MSR-tools - Intel Open Source Technology
    rdmsr / wrmsr give access to MSRs. Since it operates with '/dev/cpu/<cpu#>/msr' deivce, it requires a root privilege. And it can specify any CPU in a multi- processor system. To use '/dev/cpu/<cpu#>/msr' devices, 'msr' kernel module needs to be ...
    01.org/msr-tools/overview
  5. Model Specific Registers - OSDev Wiki
    ... APIC, etc. These MSRs are accessed using special instructions such as RDMSR (Read MSR), WRMSR (Write MSR), and RDTSC. ... Each MSR that is accessed by the RDMSR and WRMSR group of instructions is identified by a 32- bit integer. MSRs ... CPUID · CPU Registers x86 · CPU Registers x86-64 ...
    wiki.osdev.org/Model_Specific_Registers
  6. msr(4): x86 CPU MSR access device - Linux man page
    dev/cpu/CPUNUM/msr provides an interface to read and write the model-specific registers (MSRs) of an x86 CPU. CPUNUM is the number of the CPU to access as listed in /proc/cpuinfo.
    linux.die.net/man/4/msr
  7. Reading CPU model specific registers on linux - Super User
    You have misread the datasheet. IA32—IA32_THERM_STATUS is a configuration register in the platform PCI device, not a CPU MSR. It cannot be read using rdmsr .
    superuser.com/.../reading-cpu-model-specific-registers-...
  8. Model-Specific Registers (MSRs)
    The registers with addresses 0H, 1H, 10H, 11H, 12H, and 13H in Table B-1 are available only in the Pentium processor. Code code that accesses registers. 0H, 1H, and 10H will run on a P6 family processor without generating exceptions ...
    www.cs.inf.ethz.ch/stricker/lab/doc/intel-part4.pdf
  9. How is the collection of MSR registers - Intel® Developer Zone
    If MSR counters binding to the thread, whether this means that when you switch context OS(or hardware) save ... (at least in Linux: /dev/cpu/*/msr/) has no API for reading lists of target registers with a single call to the driver.
    software.intel.com/en-us/forums/software.../495827
  10. TDP and turbo parameter modification with MSR on non ...
    TDP and turbo parameter modification with MSR on non-overclockable Intel CPU (such as Intel i7-8550U) - README.md.
    gist.github.com/.../5a8edd34bd949199224b33bd90b8c...
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