Yahoo! JAPAN

検索設定 - この検索結果ページについて

MSR cpu で検索した結果 1~10件目 / 約2,450,000件 - 0.35秒

ウェブ

  1. Model-specific register - Wikipedia
    A model-specific register (MSR) is any of various control registers in the x86 instruction set used for debugging, program execution tracing, computer performance monitoring, and toggling certain CPU features.
    en.wikipedia.org/wiki/Model-specific_register
  2. CPU/MSR - SyncHack.com
    MSR (Model Specific Register、モデル固有レジスタ) †. MSR は、Pentium より実装 された CPU 固有のレジスタです。これらのレジスタは CPU 内部の特殊な制御を行うの に使用します。 MSR は、以下の用途に使用されます。
    mcn.oops.jp/wiki/index.php?CPU%2FMSR
  3. CPU/CPUID/MSR - SyncHack.com
    MSR は Pentium から実装(公式的には Pentium Pro から?)されている CPU 内部 制御用のレジスタ群です。専用の RDMSR、WRMSR 命令を使用して MSR の 読み書きを行います。MSRCPU 内部の制御を大きく変更してしまうため、 ...
    mcn.oops.jp/wiki/index.php?CPU%2FCPUID%2FMSR
  4. msr(4) - Linux manual page - man7.org
    /dev/cpu/CPUNUM/msr provides an interface to read and write the model-specific registers (MSRs) of an x86 CPU. CPUNUM is the number of the CPU to access as listed in /proc/cpuinfo. The register access is done by opening the file and ...
    man7.org/linux/man-pages/man4/msr.4.html
  5. Model Specific Registers - OSDev Wiki
    Accessing Model Specific Registers. Each MSR that is accessed by the RDMSR and WRMSR group of instructions is identified by a 32-bit integer. MSRs are 64- bit wide. The presence of MSRs on your processor is indicated ...
    wiki.osdev.org/Model_Specific_Registers
  6. Model-Specific Registers (MSRs)
    The registers with addresses 0H, 1H, 10H, 11H, 12H, and 13H in Table B-1 are available only in the Pentium processor. Code code that accesses registers. 0H, 1H, and 10H will run on a P6 family processor without generating exceptions ...
    www.cs.inf.ethz.ch/stricker/lab/doc/intel-part4.pdf
  7. msr(4): x86 CPU MSR access device - Linux man page
    dev/cpu/CPUNUM/msr provides an interface to read and write the model-specific registers (MSRs) of an x86 CPU. CPUNUM is the number of the CPU to access as listed in /proc/cpuinfo.
    linux.die.net/man/4/msr
  8. Intel® 64 and IA-32 Architectures Software Developer's Manual ...
    IA32_MPERF MSR (E7H) increments in proportion to a fixed frequency, which is configured when the processor is booted. ... If an Intel 64 processor has hardware support for opportunistic processor performance operation, the power-on.
    www.intel.com/.../64-ia-32-architectures-software-devel...
  9. TDP and turbo parameter modification with MSR on non ...
    TDP and turbo parameter modification with MSR on non-overclockable Intel CPU (such as Intel i7-8550U) - README.md.
    gist.github.com/.../5a8edd34bd949199224b33bd90b8c...
  10. Reading CPU model specific registers on linux - Super User
    You have misread the datasheet. IA32—IA32_THERM_STATUS is a configuration register in the platform PCI device, not a CPU MSR. It cannot be read using rdmsr .
    superuser.com/.../reading-cpu-model-specific-registers-...
  1  2  3  4  5  6  7  8  9  10  次へ »
検索設定 - この検索結果ページについて

Copyright (C) 2020 Yahoo Japan Corporation. All Rights Reserved.