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Recap of Part I (Exception level diagram of v8-A)
What does and ARM contain
Architecture vs micro-architecture
What does a TRM contain
Overview of Programmer's guide
Walkthrough of the ToC
Exception levels, Execution states and Execution modes
ARMv8-A ISA, Mnemonics and Addressing modes
Exception handling overview
Caches and its maintenance
Memory management Unit
Memory ordering and Synchronization Primitives
Multi-processing and PSCI
Debug infrastructure and fast models
Motivation - Why should we care?
Aarch64 exception level diagram
Mental model for visualising ELs
Why segregation into different ELs?
Non-secure and secure world
EL0, EL1 - What executes here
Hypervisor - Switching different VMs
VMs and their application in cloud computing
Motivation - Separation of Normal and Secure world
E.g. use-case Fingerprint Unlock - Flow tracing
E.g. use-case Netflix - Screenshot not allowed
Contents we will cover - Plan
Documentation we will refer throughout
Final thoughts and conclusion